1. Field of the Invention
The present invention relates to a half-bridge inverter circuit and, in particular, to a half-bridge inverter circuit to which a load driven at a high voltage is connected.
2. Description of the Related Art
A configuration of a half-bridge inverter circuit for lighting is shown in FIG. 1. Q1 and Q2 denote main switching elements, each including a power MOSFET. D1 and D2 are resonance current-commutating diodes, each including a parasitic diode between the drain and source of the power MOSFET. In a ballast circuit, L denotes a resonance reactor, C1 denotes a direct current component-cutting capacitor, C2 denotes a filament-preheating capacitor, and a circuit configuration is provided such that a fluorescent lamp 3 is connected in parallel with the filament-preheating capacitor C2.
FIG. 2 shows operating waveforms when the lamp of the circuit of FIG. 1 is on. VGS1 and VGS2 denote gate-source voltages of the main switching elements Q1 and Q2, respectively. During operation, the main switching elements Q1 and Q2 are alternately repeatedly turned on and off, and in order to prevent the main switching elements Q1 and Q2 from simultaneously being turned on, dead time periods, during which both main switching elements Q1 and Q2 are off, are provided.
The high-side main switching element Q1 is turned on when VGS1 becomes high and a drain current shown by ID1 flows. Thereby, a square wave voltage is applied to the ballast circuit composed of L, C1, C2 and fluorescent lamp 3, and a sine wave-shaped ballast current I1 flows. The ballast current I1 when the lamp is on is a composite current formed of a filament current I2 and a lamp current I3.
The low-side main switching element Q2 is turned on when VGS2 becomes high and a drain current ID2 flows. When that happens, energy which has been accumulated in the ballast circuit is discharged and the ballast current I1, the filament current 12, and the lamp current 13 decrease in the negative direction.
In an ordinary half-bridge inverter circuit, operations are carried out at a frequency in a delayed phase band which is higher than a resonance frequency. Accordingly, since the ballast current I1 can be changed by a switching frequency of the main switching elements Q1 and Q2, it becomes possible to adjust brightness.
Referring to FIG. 1, an input signal from a control circuit 1 is converted to appointed drive signals (for example, VGS1 and VGS2) at a drive circuit 2, whereby the main switching elements Q1 and Q2 are driven.
A detailed circuit block of this drive circuit 2 is shown in FIG. 6. This drive circuit 2 includes a signal input circuit 21, dead time control circuits 22 and 23 which perform dead time control on the high side and the low side, respectively, a pulse generating circuit 24, a level shifting circuit 25, a pulse filter circuit 26, a latch circuit including an RS flip-flop circuit 27, and output circuits 28 and 29 which supply drive signals HO and LO for driving the main switching elements Q1 and Q2 on the high side and the low side.
In such a drive circuit 2, an output signal from the control circuit 1 is shaped by the signal input circuit 21, then inputted into the dead time control circuits 22 and 23 which perform dead time control on the high side and the low side, and as shown in FIG. 7, a high-side output signal HO, which is delayed from the input signal (output signal from the control circuit 1), and a low-side output signal LO, which falls before the high-side output signal HO rises, are formed. For the high-side output signal HO and the low-side output signal LO, dead time periods are provided during which both become low level so that the main switching elements Q1 and Q2 are not simultaneously turned on.
In the drive circuit 2 on the high side, since the main switching element Q1 is driven at a voltage of approximately 600V, it is necessary to form a drive signal VGS1 by shifting the high-side output signal HO to a high voltage of approximately 600V. An output signal PGIN from the dead time control circuit 22 is inputted into the pulse generating circuit 24 and a set output signal OUT (Set) and a reset output signal OUT (Reset) are outputted therefrom. These signals are inputted into the subsequent level shifting circuit 25 for shifting to a high voltage and converted to a high-voltage set output signal OUT (Set) and a high-voltage reset output signal (Reset). These signals allow signals of a predetermined pulse width or longer to pass through the pass filter circuit 26, thereby setting and resetting the latch circuit 27, and a high side output signal HO is outputted from the output circuit 28, thereby driving the main switching element Q1 on the high side.
In such a half-bridge inverter circuit, in order to prevent the main switching elements Q1 and Q2 from simultaneously being turned on, dead times are provided during which both drive signals (for example, VGS1 and VGS2) are off.
However, at a start-up time, it is uncertain whether a high-side output signal is first outputted from the drive circuit or a low-side output signal is first outputted therefrom, and therefore a stable start-up condition cannot be obtained. A problem exists that if the high-side output signal is first outputted, the main switching elements Q1 and Q2 are simultaneously turned on.
The present invention is provided to solve the foregoing problem such that at a start-up time two main switching elements simultaneously may turn to the on-mode, and provides a half-bridge inverter circuit including dead time control circuits on the high side and the low side which form dead time periods based on an input signal to be inputted from a control circuit, and a start-up circuit including a latch circuit, which is reset upon detection of a rise in power supply on the low side, then set by a low-side output signal from the dead time control circuit on the low side, and a gate circuit, which receives the low-side output signal in response to an output from the latch circuit, then allows a high-side output signal from the dead time control circuit on the high side to pass. This configuration prevents the two main switching elements from being simultaneously turned on at a start-up time.
According to the present invention, by providing the start-up circuit which prioritizes a low side signal, the main switching element on the low side is always first turned on at start-up. Thus, an advantage exists such that a stable start-up of the half-bridge inverter circuit can be performed.